Nonvolatile semiconductor memory equipped with single bit and mu

Details Nonvolatile semiconductor memory equipped with single bit and mu Nonvolatile semiconductor memory equipped with single bit and mu

1997-09-12

1999-10-12

Hoang, Huan

Static information storage and retrieval

Floating gate

Particular connection

36518512, 36518503, G11C 1604

Patent

active

059663260

ABSTRACT:
A nonvolatile semiconductor memory having a single bit cell array and a multi-bit cell array formed on a substrate of the memory is provided. The memory includes a plurality of memory blocks that correspond to the input/output lines and is divided into a plurality of pages. A plurality of bit lines of the single bit cell array is coupled to a plurality of page buffers. The multi-bit cell array includes a plurality of memory blocks in which one of the blocks corresponds to a plurality of the input/output lines and is divided into a plurality of pages. A plurality of bit lines of the multi-bit cell array is coupled to a plurality of page buffers, A timing controller arranges the processing operations in the two arrays.

REFERENCES:
patent: 5557567 (1996-09-01), Bergemont et al.
patent: 5587949 (1996-12-01), Bergemont et al.
patent: 5625590 (1997-04-01), Choi et al.
patent: 5671178 (1997-09-01), Park et al.
patent: 5754469 (1998-05-01), Hung et al.

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