Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-07-13
2009-02-17
Phan, Trong (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185210, C365S185250, C365S185260, C365S185330
Reexamination Certificate
active
07492637
ABSTRACT:
A nonvolatile semiconductor memory device may include a cell array and a program modulation unit. The cell array may further include a plurality of word lines, a plurality of bit lines, a plurality of cell transistors and a plurality of source lines. The plurality of bit lines may intersect the plurality of word lines. The plurality of cell transistors may be arranged at intersections of the word lines and bit lines, and may have drains and gates connected to the bit lines and the word lines, respectively. The source lines may be connected to sources of the plurality of cell transistors. The program-voltage modulation unit may modulate a program voltage based on a number of cell transistors selected for programming.
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Choi Jeong-Un
Kim Jae-Hyun
Harness Dickey & Pierce PLC
Phan Trong
Samsung Electronics Co,. Ltd.
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