Nonvolatile semiconductor memory device with shaped floating gat

Details Nonvolatile semiconductor memory device with shaped floating gat Nonvolatile semiconductor memory device with shaped floating gat

1994-10-07

1996-09-17

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, 257322, 36518501, H01L 29788, G11C 1134

Patent

active

055571239

ABSTRACT:
A nonvolatile semiconductor memory device with improved writing characteristics. The memory device has memory cell transistors arranged in rows and columns. The memory cell transistors belonging to the same column share a source region and a drain region, and a channel region is disposed between the source and drain regions. The interval between the source and drain regions is the isolation width. Each of the memory cell transistors has a floating gate electrode disposed on the channel region with a first gate insulating film and a control gate electrode disposed on the floating gate electrode with a second gate insulating film. The floating gate electrode does not have a constant width and has a portion narrower than the isolation width which is free from the floating gate electrode. The narrower portion is typically formed as a constricted portion of the floating gate electrode.

REFERENCES:
patent: 5338957 (1994-08-01), Fukumoto

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