Nonvolatile semiconductor memory device with scalable two...

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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C365S185110

Reexamination Certificate

active

07113425

ABSTRACT:
A nonvolatile memory device includes a bit line, a pair of data lines and a plurality of scalable two transistor memory (STTM) cells. The memory cells are arranged between a pair of datalines so as to share the bit line. The memory device further includes a data line selection circuit and a sense amplification circuit. The data line selection circuit selects one of a pair of data lines, and the sense amplification circuit senses and amplifies a voltage difference between the bit line and the selected data line. Operation speed is increased, while improving device cell array structure.

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patent: 6710465 (2004-03-01), Song et al.
patent: 6757196 (2004-06-01), Tsao et al.
patent: 6831860 (2004-12-01), Lee et al.
patent: 6882561 (2005-04-01), Kwon et al.

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