Nonvolatile semiconductor memory device with dual insulation lay

Details Nonvolatile semiconductor memory device with dual insulation lay Nonvolatile semiconductor memory device with dual insulation lay

1996-03-04

1997-06-10

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257321, 257324, 36518529, 36518533, H01L 29788

Patent

active

056378971

ABSTRACT:
A non-volatile semiconductor memory, called EPROM has a plurality of memory cells arrayed in a matrix and each having a laminate gate structure including a part of a strip control gate and a separate floating gate. A plurality of erasing gates is disposed in one of each two of spaces formed between two adjacent gate structures. Other of the each two of the spaces is filled with a laminate including a silicon nitride film and a silicon oxide film overlying the silicon nitride film. The erasing gates and the laminates are arranged alternately, so that the laminates do not cover the erasing gates. Difference in level between the memory cell section and the peripheral section is reduced to thereby prevent breakage of interconnects overlying the erasing gates. Etching of the substrate surface can be avoided to thereby obtain an improvement in the yield of the memory device.

REFERENCES:
patent: 5053841 (1991-10-01), Miyakawa et al.
patent: 5252846 (1993-10-01), Tanaka et al.

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