Nonvolatile semiconductor memory device using SOI

Details Nonvolatile semiconductor memory device using SOI Nonvolatile semiconductor memory device using SOI

1998-11-25

2000-09-05

Dinh, Son T.

Static information storage and retrieval

Floating gate

Particular connection

36518518, 36518524, G11C 1604

Patent

active

061152870

ABSTRACT:
A NAND type EEPROM according to the present invention is formed on an SOI substrate as follows. Silicon thin films (element regions) isolated in a grid pattern are formed on an insulation layer on a silicon substrate. A trench between the silicon thin films is filled with insulating material. Thus, the elements in the row direction are isolated completely by the insulating material. A silicon thin film on which a memory cell is formed, contains a very small amount of n-type impurities and is close to an intrinsic semiconductor. A silicon thin film on which a select gate transistor is formed is of a p-type. The source and drain diffusion layers of the memory cell and select gate transistor are of an n-type. The channel of each of memory cells constituting a NAND string is constituted of at least two regions having different threshold voltages.

REFERENCES:
patent: 5706228 (1998-01-01), Chang et al.
patent: 5784325 (1998-07-01), Arase et al.
patent: 5889699 (1999-03-01), Takano

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