Nonvolatile semiconductor memory device having reduced...

Details Nonvolatile semiconductor memory device having reduced... Nonvolatile semiconductor memory device having reduced...

2006-05-23

2006-05-23

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185300, C365S185180, C365S185190, C365S185220, C365S185240, C365S185110, C365S218000

Reexamination Certificate

active

07050336

ABSTRACT:
An operation of erasing data in a memory block of a nonvolatile semiconductor memory device employs an operation of collectively applying an erase pulse to the memory block, and an operation of collectively applying an erase pulse to a limited region in the memory block. Thereby, the number of the erase pulses excessively applied to the memory cells, which passed verify, can be reduced as compared with a conventional structure so that the number of the memory cells to be subjected to over-erase recovery write decreases, and the total block erase time can be short.

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