Static information storage and retrieval – Read/write circuit
Patent
1994-01-13
1994-10-11
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
36518907, 365218, 365220, 36523006, G11C 700
Patent
active
053553349
ABSTRACT:
In a nonvolatile semiconductor memory device formed by nonvolatile memory cells connected to word lines and bit lines, one of the word lines is selected and driven by row address decoders, and one of the bit lines is selected and driven by column address decoders. An address degenerating circuit formed by NAND circuits, OR circuits or the like is interposed at a prestage of the row address decoders or the column address decoders, thus enabling a parallel write and read function.
REFERENCES:
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 4860260 (1989-08-01), Saito et al.
patent: 5111433 (1992-05-01), Miramoto
patent: 5267210 (1993-11-01), McClure et al.
Fuchigami Keisuke
Koga Hiroki
LaRoche Eugene R.
NEC Corporation
Nguyen Tan
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