Nonvolatile semiconductor memory device having memory cell trans

Details Nonvolatile semiconductor memory device having memory cell trans Nonvolatile semiconductor memory device having memory cell trans

1996-10-02

1998-11-17

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257326, H01L 29792

Patent

active

058380418

ABSTRACT:
The present invention discloses a nonvolatile semiconductor memory device having a memory cell transistor in which an offset region is provided as a charge carrier injecting region. An insulating film and a gate electrode is formed in order of mention on a semiconductor substrate. Source/drain regions are formed on the surface of the semiconductor substrate with the gate electrode interposed therebetween. The drain has an LDD (Lightly Doped Drain) structure. Furthermore, a layered film of silicon oxide films and a SiN film is provided on a channel region between an edge of the gate electrode and a source diffusion layer. To be more specific, the layered film is formed in such a way that the SiN film is interposed between the silicon oxide films, constituting a side wall of the gate electrode. The SiN film is a charge carrier accumulating layer. Contact holes are formed in an insulating film between layers, respectively reaching the source and drain regions. Each of the contact holes are filled with a conductive material (contact plug). A conductive barrier film (diffusion protecting film) is provided on the bottom and to the inner wall portions of the contact hole. The contact plugs respectively connect the source and the drain to upper layer, aluminium wiring.

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Seiji Yamada et al., 1991 IEEE, "A Self-Convergence Erasing Scheme For A Simple Stacked Gate Flash EEPROM", pp. 91-307 to 91-310.
N. Matsukawa et al., "A Hot Carrier Indeed Low-Level Leakage Current in thin Silicon Dioxide Films", 1995 IEEE, pp. 162-167.

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