Nonvolatile semiconductor memory device having first and second

Details Nonvolatile semiconductor memory device having first and second Nonvolatile semiconductor memory device having first and second

1996-12-17

1999-07-27

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257316, 257319, 36518528, H01L 29788

Patent

active

059294809

ABSTRACT:
A nonvolatile semiconductor memory is composed of a number of multi-bit memory cells, each including a first floating gate and a second floating gate formed, side by side, and insulated from each other, on a first gate insulator film formed on a channel region defined between a source region and a drain region, a second gate insulator film formed to cover a surface of each of the floating gates, and a control gate formed on the second gate insulator film. The first floating gate is positioned above a source side of the channel region, and the second floating gate is postioned above a drain side of the channel region. At least the first floating gate is formed of a side wall polysilicon having a gate length remarkably smaller than that of the second floating gate or the control gate. Accordingly, the resulting channel length of the memory cell is remarkably reduced, with the result that the occupying area of each memory cell and the occupying area of a necessary peripheral circuit can be reduced.

REFERENCES:
patent: 5596529 (1997-01-01), Noda et al.
"A Source Side Injection Erasable Programmable Read-Only-Memory (SI-EPROM) Device," by A.T. Wu et al., IEEE Electron Device Letters, EDL-7, No. 9, Sep. 1986, pp. 540-542.

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