Nonvolatile semiconductor memory device having configuration...

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S185170, C365S185180, C365S185290

Reexamination Certificate

active

07079437

ABSTRACT:
A nonvolatile semiconductor memory device having a plurality of electrically rewritable nonvolatile memory cells connected in series together is disclosed. A select gate transistor is connected in series to the serial combination of memory cells. A certain one of the memory cells which is located adjacent to the select gate transistor is for use as a dummy cell. This dummy cell is not used for data storage. During data erasing, the dummy cell is applied with the same bias voltage as that for the other memory cells.

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patent: 5815436 (1998-09-01), Tanaka et al.
patent: 6011287 (2000-01-01), Itoh et al.
patent: 6055181 (2000-04-01), Tanaka et al.
patent: 6188608 (2001-02-01), Maruyama et al.
patent: 3-295098 (1991-12-01), None
patent: 11-86571 (1999-03-01), None

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