Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-07-29
2008-07-29
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185020, C365S185170
Reexamination Certificate
active
07405978
ABSTRACT:
A semiconductor memory device comprises a cell array including a plurality of memory cells. The semiconductor memory device further comprises a plurality of bitlines formed in a bit layer and connected to the plurality of memory cells, wherein the bitlines extend from the cell array along a single direction. A common source line is formed in a common source layer and adapted to provide a predetermined source voltage to the plurality of memory cells. A voltage control block comprising a plurality of voltage control circuits adapted to control the voltage levels of the plurality of bitlines through voltage supply lines formed in a voltage-line metal layer is formed on one side of the cell array.
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Byeon Dae Seok
Hahn Wook-Ghee
Samsung Electronics Co,. Ltd.
Tran Andrew Q
Volentine & Whitt PLLC
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