Nonvolatile semiconductor memory device having a memory cell tra

Details Nonvolatile semiconductor memory device having a memory cell tra Nonvolatile semiconductor memory device having a memory cell tra

1994-12-09

1996-09-10

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257319, 257316, 257382, 257758, 36518501, 36518505, H07L 2968

Patent

active

055548679

ABSTRACT:
A nonvolatile semiconductor memory device is provided including a DINOR (Divided Bit Line NOR) type cell that allows further reduction of the cell size while ensuring immunity from drain-disturb. In the nonvolatile semiconductor memory device, a sub-bit line is formed to have a length corresponding to the length of 16-1024 memory cell transistors. Memory cell transistors corresponding to the length of that sub-bit line are connected to the sub-bit line. Thus, the effective cell size is reduced while ensuring immunity from drain-disturb.

REFERENCES:
patent: 4868619 (1989-09-01), Mukherjee et al.
patent: 5416349 (1995-05-01), Bergemont
"Alternate Metal Virtual Ground EPROM Array Implemented in a 0.8 .mu.m Process for Very High Density Applications", R. Kazerunian et al., IEDM 91, pp. 311-314.
"A Novel Cell Structure Suitable for a 3 Volt Operation, Sector Erase Flash Memory", H. Onoda et al., IEDM 92, pp. 599-602.

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