Nonvolatile semiconductor memory device having a memory cell...

Details Nonvolatile semiconductor memory device having a memory cell... Nonvolatile semiconductor memory device having a memory cell...

2005-04-12

2005-04-12

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S316000, C438S257000

Reexamination Certificate

active

06878985

ABSTRACT:
Element isolation insulating layers have an STI structure, and their upper surfaces are flat. A floating gate electrode is formed in a recess which is formed by projections of the element isolation insulating layers. The two opposing side surfaces of the floating gate electrode are covered with the element isolation insulating layers. The upper surface of the floating gate electrode is substantially leveled with the upper surfaces of the element isolation insulating layers. A gate insulating layer is formed on the floating gate electrode and element isolation insulating layers. The underlayer of this gate insulating layer is flat. A control gate electrode is formed on the gate insulating layer.

REFERENCES:
patent: 6274434 (2001-08-01), Koido et al.
patent: 6617636 (2003-09-01), Tuan et al.
patent: 6643186 (2003-11-01), Tuan et al.
patent: 6661052 (2003-12-01), Matsui et al.
patent: 11-163304 (1999-06-01), None

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