Static information storage and retrieval – Read/write circuit – Erase
Patent
1992-09-10
1995-03-28
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Erase
365185, 36518909, 365900, 365 2306, G11C 700
Patent
active
054023823
ABSTRACT:
A nonvolatile semiconductor memory device has a plurality of memory cells, which are arranged in a matrix form having rows and columns and each have floating a gate for holding an information charge, a plurality of bit lines, a plurality of word lines, a plurality of source lines, and a high voltage generator for generating a negative high voltage. The high voltage generator is connected to each word line and has a capacitor to which a predetermined clock is applied in response to a signal for selecting word lines. The semiconductor memory device further comprises an erasing device, which applies the negative high voltage generated by, the high voltage generator to the word line selected by the selection signal in the erasing operation. The erasing device grounds the source line connected to the source of the corresponding memory cell.
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Futatsuya Tomoshi
Kobayashi Shin-ichi
Miyawaki Yoshikazu
Nakayama Takeshi
Terada Yasushi
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Tan
Popek Joseph A.
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