Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-09-20
2010-10-26
Le, Thao (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S257000, C438S775000
Reexamination Certificate
active
07821056
ABSTRACT:
A nonvolatile semiconductor memory device includes an array of nonvolatile memory cell transistors, each of which is configured such that a tunnel insulation film, a floating gate electrode, a floating gate insulation film and a control gate electrode are stacked on a surface of a semiconductor substrate. A mean roughness of an interface between a polysilicon, of which the floating gate electrode is formed, and the floating gate insulation film is 1.5 nm or less.
REFERENCES:
patent: 6107169 (2000-08-01), Park
patent: 6153470 (2000-11-01), He et al.
patent: 7622383 (2009-11-01), Kim et al.
patent: 2006/0234454 (2006-10-01), Yasui et al.
patent: 2007/0020841 (2007-01-01), Hwang et al.
patent: 2008/0032465 (2008-02-01), Ahn et al.
patent: 2009/0134465 (2009-05-01), Shimizu
patent: 8-83854 (1996-03-01), None
patent: 2001-15504 (2001-01-01), None
patent: 2001-127178 (2001-05-01), None
patent: 2002-261091 (2002-09-01), None
patent: 2002-289713 (2002-10-01), None
patent: 2003-17595 (2003-01-01), None
patent: 2003-309117 (2003-10-01), None
patent: 2004-200672 (2004-07-01), None
patent: 2005-93562 (2005-04-01), None
patent: 2005-150738 (2005-06-01), None
H. Akahori et al., “Atomic Order Flattening of Hydrogen-Terminated Si(110) substrate For Next Generation ULSI Devices,” Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials (2003), pp. 458-459.
A Notification of Reasons For Rejection mailed by the Japanese Patent Office on Feb. 17, 2009, for Japanese Patent Application No. 2006-256009, and English language translation thereof.
Ho et al., “Thermal Oxidation of Heavily Phosphorus-Doped Silicon,” Purification of Metallurgical Silicon (Apr. 1978), 125:665-671.
Decision of Rejection, mailed May 25, 2010, in corresponding Japanese Patent Application No. 2006-256009, and English-language translation thereof.
Akahori Hiroshi
Takeuchi Wakako
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Le Thao
LandOfFree
Nonvolatile semiconductor memory device and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4196173