Nonvolatile semiconductor memory device and method of...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S189050, C365S189070

Reexamination Certificate

active

06850437

ABSTRACT:
A nonvolatile semiconductor memory device includes a first memory cell array including electrically re-programmable main memory cells, a second memory cell array including electrically data-programmable redundancy memory cells, a first storage configured to store a specified code, a first comparator configured to compare a selected code with the specified code to generate an activating signal, a faulty address latch circuit configured to be activated by the activating signal and controlled to temporarily latch a fault address corresponding to the fault, a second storage configured to store the faulty address latched by the faulty address latch circuit, a second comparator configured to compare an input address with the faulty address to generate a replacement control signal when the input address coincides with the faulty address, and a replacing circuit configured to replace an output of the first memory cell array with an output of the second memory cell array.

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patent: 5586075 (1996-12-01), Miwa
patent: 5841711 (1998-11-01), Watanabe
patent: 6327180 (2001-12-01), Taura et al.
patent: 6496413 (2002-12-01), Taura et al.
patent: 6711057 (2004-03-01), Taura et al.

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