Nonvolatile semiconductor memory device and manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE27103

Reexamination Certificate

active

07906804

ABSTRACT:
A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.

REFERENCES:
patent: 6768161 (2004-07-01), Kinoshita
patent: 7227219 (2007-06-01), Mikolajick
patent: 2005/0029576 (2005-02-01), Matsuno et al.
patent: 2005/0029578 (2005-02-01), Nishizaka
patent: 2006/0051921 (2006-03-01), Youn et al.
patent: 11-154711 (1999-06-01), None
patent: 2003-31705 (2003-01-01), None
patent: 3484023 (2003-10-01), None

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