Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2009-06-19
2010-10-26
Tran, Tan N (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S314000, C257S315000, C257S316000, C257SE29129
Reexamination Certificate
active
07821057
ABSTRACT:
A nonvolatile semiconductor memory device includes a semiconductor substrate of a first conductivity type, a pair of source and drain diffusion regions of a second conductivity type oppositely formed on a surface of the semiconductor substrate, and a stacked structure having a gate insulating film, a charge accumulation film, an interlayer insulating film and a control gate which are formed in order on a channel region of the surface of the semiconductor substrate interposed between the source and drain diffusion regions. An edge of the stacked structure in the vicinity of the source region is formed away from a junction position between the source diffusion region and the channel region.
REFERENCES:
patent: 6330187 (2001-12-01), Choi et al.
patent: 2006/0267067 (2006-11-01), Ishihara
patent: 6-5874 (1994-01-01), None
patent: 6-204488 (1994-07-01), None
patent: 7-94609 (1995-04-01), None
patent: 7-161850 (1995-06-01), None
patent: 7-297299 (1995-11-01), None
patent: 8-55921 (1996-02-01), None
patent: 2000-332138 (2000-11-01), None
patent: 2001-291784 (2001-10-01), None
patent: 2002-43443 (2002-02-01), None
patent: 2003-124364 (2003-04-01), None
N. Mohapatra et al., “Chisel Programming Operation of Scaled NOR Flash EEPROMs—Effect of Voltage Scaling, Device Scaling and Technological Parameters,” IEEE Transactions on Electron Devices, vol. 50, No. 10, pp. 2104-2111 (Oct. 2003).
Notification of Reasons for Rejection issued by the Japanese Patent Office on Nov. 4, 2008, for Japanese Patent Application No. 2006-183658, and English-language translation thereof.
Final Notice of Rejection mailed by the Japanese Patent Office on Jan. 27, 2009, for Japanese Patent Application No. 2006-183658, and English language translation thereof.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Tran Tan N
LandOfFree
Nonvolatile semiconductor memory device and manufacturing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device and manufacturing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device and manufacturing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4195443