Nonvolatile semiconductor memory device and manufacturing...

Details Nonvolatile semiconductor memory device and manufacturing... Nonvolatile semiconductor memory device and manufacturing...

2006-02-28

2008-12-02

Elms, Richard (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S530000, C257S296000

Reexamination Certificate

active

07459747

ABSTRACT:
The invention realizes a smaller-sized OTP memory cell and large reduction of its manufacturing process and cost. An embedded layer (BN+) to be a lower electrode of a capacitor is formed in a drain region of a cell transistor of an OTP memory, a capacitor insulation film having a small thickness where dielectric breakdown can occur by a predetermined voltage applied from a data line is formed on this embedded layer, and a conductive layer to be an upper electrode of a capacitor is formed on the capacitor insulation film and on a field oxide film. The embedded layer (BN+) partially overlaps a high concentration drain region (N+).

REFERENCES:
patent: 4899205 (1990-02-01), Hamdy et al.
patent: 5278784 (1994-01-01), Ishihara et al.
patent: 5386135 (1995-01-01), Nakazato et al.
patent: 2003-114247 (2003-04-01), None
patent: 2004-193606 (2004-07-01), None
patent: 2004-356631 (2004-12-01), None

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