Nonvolatile semiconductor memory device and its...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S315000, C257S316000, C257S324000, C257S325000, C438S257000

Reexamination Certificate

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06927446

ABSTRACT:
A first diffused layer and a second diffused layer are formed on the major surface of a silicon substrate. A first insulating layer, a second insulating layer or a semiconductor layer, and a third insulating layer are laminated on the major surface of the silicon substrate in the vicinity of the first diffused layer or the second diffused layer and are partially formed. A fourth insulating layer is formed as a gate insulating film. A fifth insulating layer is formed on the side walls of the second insulating layer or the semiconductor layer. In a region of most of a channel, the gate insulating film is formed and a gate electrode is formed so that it covers the gate insulating film and the laminated films. According to this structure, the operating voltage of a flash memory is reduced, the operation is easily sped up and the holding characteristic of information charge can be enhanced.

REFERENCES:
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patent: 5768192 (1998-06-01), Eitan
patent: 5874759 (1999-02-01), Park
patent: 5966603 (1999-10-01), Eitan
patent: 6265265 (2001-07-01), Lim
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patent: 6727144 (2004-04-01), Hashimoto
patent: 6828619 (2004-12-01), Yoshino
patent: 2003/0203572 (2003-10-01), Yoshino
Hayashi et al., “Twin MONOS Cell with Dual Control Gates”, 2000 Symposium on VLSTI Technology Digest of Technical Papers; pp. 122-123 (13.2).

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