Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

1996-11-01

1998-12-01

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, 257317, 257318, 257370, 36518528, H01L 2976

Patent

active

058442685

ABSTRACT:
A select MOS transistor and a data storage MOS transistor are formed in an element region. The transistor has floating-gate electrodes. The floating-gate electrodes are spaced apart above the element region and connected to each other above a field region. Only a tunnel insulating film much thinner than a gate insulating film of the transistor is placed between the floating-gate electrode and a drain region. Only the gate insulating film much thinner than the gate insulating film of the transistor is placed between the floating-gate electrode and the channel region of the transistor. In the element region, the shape of a control electrode is the same as that of the floating-gate electrodes.

REFERENCES:
patent: 4794562 (1988-12-01), Kato et al.
patent: 4804637 (1989-02-01), Smayling et al.
patent: 5066992 (1991-11-01), Wu et al.
patent: 5282161 (1994-01-01), Villa
patent: 5432740 (1995-07-01), D'arrigo et al.
Sze, High Speed Semiconductor Devices, John Wiley & Sons, Inc., 1990, pp. 139-143.
J. Noda et al., "A Novel EEPROM Cell for High Density Application and Single Power Supply Operation", The 13th Annual IEEE Nonvolatile Semiconductor Workshop, Feb. 20-22, 1984.
R. Shirota et al., "An Accurate Model of Subbreakdown Due to Band-to-Band Tunneling and Its Application", IEDM Technical Digest, 1988, pp. 26-29.

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