Nonvolatile semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257316, 257320, 257323, 365185, H01L 29788

Patent

active

059947322

ABSTRACT:
A nonvolatile semiconductor memory device has a plurality of p well regions in a memory cell array region. P well region is independently provided for each erase block. Each p well region is connected to a common well/source line driver, respectively. Well/source line driver is connected to a well/source power supply and a well/block decoder. Therefore, a nonvolatile semiconductor memory device which can inhibit a well disturbance in erase operation can be provided.

REFERENCES:
patent: 4878199 (1989-10-01), Mizutani
patent: 5554867 (1996-09-01), Ajika et al.
"A Novel Cell Structure Suitable For A 3 Volt Operation, Sector Erase Flash Memory", H. Onoda et al., IEDM 92 pp. 599-602.
"Improved Array Architectures . . . ", Hiroshi Onoda et al. IEICE Trans. Electron., vol. E77-C No. 8 Aug. 1994, pp. 1279-1286.

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