Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

1995-05-04

1996-12-31

Fears, Terrell W.

Static information storage and retrieval

Floating gate

36518901, G11C 1300

Patent

active

055900720

ABSTRACT:
An electrically erasable and programmable read only memory device includes a first select device and a NAND cell string consisting of a plurality or memory transistors. Each memory transistor has a floating gate separated by a tunnel oxide layer from a channel region formed on a semiconductor substrate and a control gate separated by an interlayer insulation layer from the floating gate. Respective channels of the memory transistors are serially connected to each other by source-drain regions. The control gate is connected to a corresponding word line. The first select device connects one terminal of the NAND cell string to a corresponding bit line. A resistor having a preset resistance value is connected between the first select device and a bit line. An amplifying device amplifies current flowing through the NAND cell string and supplies the amplified current to the bit line.

REFERENCES:
patent: 4903236 (1990-02-01), Nakayama et al.

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