Nonvolatile semiconductor memory device

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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Details

C365S065000, C365S189090

Reexamination Certificate

active

08045358

ABSTRACT:
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory device including: a memory cell array including: memory cell blocks each having series-connected memory cells; wordlines; and a bitline pair connected to the memory cell blocks, one functioning as a readout bitline, the other one functioning as a reference bitline; an amplification circuit connected to the bitline pair to amplify a signal difference therebetween; and a reference voltage generation circuit including: a dummy memory cell block that has the same configuration as the memory cell block, that has one terminal connected to a first dummy plate line and that has the other terminal connected to the reference bitline; and a paraelectric capacitor that has one terminal connected to a second dummy plate line and that has the other terminal connected to the reference bitline.

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patent: 6566698 (2003-05-01), Nishihara et al.
patent: 6664118 (2003-12-01), Nishihara et al.
patent: 6822891 (2004-11-01), Hoya et al.
patent: 7092274 (2006-08-01), Hoya et al.
patent: 7092304 (2006-08-01), Ogiwara et al.
patent: 7589513 (2009-09-01), Ogiwara et al.
patent: 2007/0274138 (2007-11-01), Ogiwara et al.
patent: 2007-280458 (2007-10-01), None
patent: 2007-280458 (2007-10-01), None
Background Art Information.

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