Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-05-30
2006-05-30
Tran, Mai-Huong (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S200000, C438S257000, C438S258000, C438S259000, C438S260000, C438S267000, C365S185020, C365S185180, C365S185270, C365S185280, C365S185290
Reexamination Certificate
active
07053442
ABSTRACT:
A nonvolatile semiconductor memory device having a small layout area includes a memory cell array in which a plurality of memory cells are arranged in a row direction and a column direction. The memory cell array includes source line diffusion layers, each of the source line diffusion layers extending along the row direction and connecting in common with the memory cells arranged in the row direction, bitline diffusion layers, element isolation regions which separate each of the bitline diffusion layers, and word gate common connection sections. Each of the memory cells includes a word gate and a select gate. One of the bitline diffusion layers is formed between two word gates adjacent in the column direction Y. Each of the word gate common connection sections is connected with the two word gates above one of the element isolation regions.
REFERENCES:
patent: 5408115 (1995-04-01), Chang
patent: 5422504 (1995-06-01), Chang et al.
patent: 5494838 (1996-02-01), Chang et al.
patent: 5969383 (1999-10-01), Chang et al.
patent: 6177318 (2001-01-01), Ogura et al.
patent: 6248633 (2001-06-01), Ogura et al.
patent: 6255166 (2001-07-01), Ogura et al.
patent: 6587380 (2003-07-01), Kanai et al.
patent: 6587381 (2003-07-01), Kanai et al.
patent: 6646916 (2003-11-01), Kamei
patent: 6650591 (2003-11-01), Owa
patent: 6654282 (2003-11-01), Kanai
patent: 6697280 (2004-02-01), Natori
patent: 6704224 (2004-03-01), Natori
patent: 6707695 (2004-03-01), Owa
patent: 6707716 (2004-03-01), Natori
patent: 6707720 (2004-03-01), Kamei et al.
patent: 6707742 (2004-03-01), Kamei
patent: 6710399 (2004-03-01), Kamei
patent: 6717854 (2004-04-01), Natori
patent: 6738291 (2004-05-01), Kamei
patent: 6744106 (2004-06-01), Kanai
patent: 6757197 (2004-06-01), Kamei
patent: 6759290 (2004-07-01), Ogura et al.
patent: 6760253 (2004-07-01), Kamei
patent: 6762960 (2004-07-01), Natori
patent: 2002/0191453 (2002-12-01), Owa
patent: 2003/0025149 (2003-02-01), Kanai
patent: 2003/0025150 (2003-02-01), Kanai et al.
patent: 2003/0027411 (2003-02-01), Kanai
patent: 2003/0072191 (2003-04-01), Kamei
patent: 2003/0072194 (2003-04-01), Kamei
patent: 2003/0095443 (2003-05-01), Natori
patent: 2003/0151070 (2003-08-01), Natori
patent: 2003/0164517 (2003-09-01), Kamei
patent: 2003/0174558 (2003-09-01), Kamei
patent: 2003/0179609 (2003-09-01), Natori
patent: 2003/0198102 (2003-10-01), Kamei
patent: 2003/0198103 (2003-10-01), Kamei
patent: 2004/0013018 (2004-01-01), Kanai
patent: 2004/0013027 (2004-01-01), Kanai
patent: 2004/0061139 (2004-04-01), Natori
patent: 2004/0229407 (2004-11-01), Owa
patent: A 6-181319 (1994-06-01), None
patent: A 7-161851 (1995-06-01), None
patent: A 11-74389 (1999-03-01), None
patent: B1 2978477 (1999-09-01), None
patent: A 2001-156188 (2001-06-01), None
patent: 2003-100917 (2003-04-01), None
U.S. Appl. No. 10/728,746, filed Dec. 8, 2003, Natori.
U.S. Appl. No. 10/733,455, filed Dec. 12, 2003, Kanai.
U.S. Appl. No. 10/779,683, filed Feb. 18, 2004, Kanai.
U.S. Appl. No. 10/782,950, filed Feb. 23, 2004, Owa.
U.S. Appl. No. 10/783,019, filed Feb. 23, 2004 Maemura.
U.S. Appl. No. 10/782,974, filed Feb. 23, 2004, Owa.
Hayashi et al., “Twin MONOS Cell with Dual Control Gates,” Symposium on VLSI Technology Digest of Technical Papers, 2000.
Chang et al., “A New SONOS Memory Using Source-Side Injection for Programming,” IEEE Electron Device Letters, vol. 19, No. 7, pp. 253-255, Jul. 1998.
Chen et al., “A Novel Flash Memory Device with S Plit Gate Source Side Injection and ONO Charge Storage Stack (SPIN),” Symposium on VLSI Technology Digest of Technical Papers, pp. 63-64.
Oliff & Berridg,e PLC
Seiko Epson Corporation
Tran Mai-Huong
LandOfFree
Nonvolatile semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3613540