Nonvolatile semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S298000, C365S185120

Reexamination Certificate

active

06927443

ABSTRACT:
A nonvolatile semiconductor memory device improved with integration degree, in which the gate of the selection transistors is separated on each of active regions, first and second selection transistors are arranged in two stages in the direction of the global bit line, the gates for the selection transistors in each stage are disposed on every other active regions, contact holes are formed in mirror asymmetry with respect to line B—B in the connection portion for the active regions, the gate is connected through the contact hole to the wiring, the adjacent active regions are connected entirely in one selection transistor portion and connected in an H-shape for adjacent two active regions in another selection transistor portion, and the contact hole is formed in the connection portion and connected when the global bit line, whereby the pitch for the selection transistor portion can be decreased in the direction of the global bit line.

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patent: 6504763 (2003-01-01), Yang et al.
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patent: 6765840 (2004-07-01), Sato et al.
patent: 02-074069 (1990-03-01), None
patent: 08-046159 (1996-02-01), None

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