Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2000-12-22

2002-02-05

Zarabian, A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S117000

Reexamination Certificate

active

06344991

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, and more specifically, it relates to a nonvolatile semiconductor memory device rewriting stored information by polarization reversal of a ferroelectric material.
2. Description of the Prior Art
A nonvolatile ferroelectric memory rewriting stored information by polarization reversal of a ferroelectric material is generally referred to as an FRAM (ferroelectric random access memory). Memory cells of such an FRAM are roughly classifiable into two types of structures.
In the first structure of a DRAM (dynamic random access memory) type, charges are stored in a storage capacitor as information. In this structure, memory cells formed by ferroelectric capacitors and switching transistors are arranged in the form of a matrix for performing addressing with a bit line and a word line connected to each transistor and detecting charges following inversion of polarization as shown in FIG.
65
. The operation principle of an FRAM memory cell having such a structure is as follows:
As shown in
FIG. 66
, the relation between a polarization value B of the ferroelectric capacitor and an applied voltage V draws a hysteresis loop. In a nonvolatile operation, information is stored in points A and B of two states under an applied voltage “0 V”. It is assumed here that the polarization state of the storage capacitor is at the point A. The polarization value moves to a point C when applying 5 V and 0 V to a plate line and the bit line respectively, and returns to the point A when returning the applied voltage to 0 V. However, the polarization value moves to a point D due to polarization inversion when applying 0 V and 5 V to the plate line and the bit line respectively, and moves to the point B after returning the applied voltage to 0 V. This indicates that the stored information is rewritten from the point A to the point B. Thus, the storage state can be rewritten by changing the voltages applied to the plate line and the bit line for externally determining the stored information as a polarization current.
In the second structure of an FET (field-effect transistor) type, a silicon oxide film forming a gate insulator film of a general MOS (metal oxide semiconductor) FET is replaced with a ferroelectric film as shown in
FIG. 67
, and this structure is referred to as an MFSFET. An MFSMISFET type memory cell formed by inserting a floating gate between a gate electrode and a channel as shown in
FIG. 68
is also proposed as a modification of this structure.
In each of the first and second structures, a single type of ferroelectric material is generally employed for the FRAM.
When the stored information is rewritten a number of times in the FRAM, however, a hysteresis characteristic is deteriorated to educe the quantity of read charges. Further, dispersion of hysteresis characteristics of ferroelectric capacitors in large-scale memory cells, particularly dispersion in coercive filed results in write and read failures. Thus, the FRAM has such disadvantages that stable operations of writing and reading stored information cannot be attained, the FRAM must be driven with a sufficient write voltage, and a drive time and a drive voltage are limited.
FIG. 69
shows memory cells of a 2T2C system provided for overcoming such disadvantages. In the 2T2C system, complementary signals from two memory cells in which data are complementarily written are input as two differential inputs in a sense amplifier for detecting the data. Therefore, two storage capacitors of a single memory cell are subjected to writing by the same number of times, and hence ferroelectric films are equally deteriorated to enable stable operations. In this case, however, the memory cell area is doubled to disadvantageously increase the chip area.
In order to prevent dispersion in coercive filed, the thickness of ferroelectric films may be reduced. In this case, however, voltage resistance across electrodes is reduced to disadvantageously cause dielectric breakdown.
While a single ferroelectric film is generally held between a pair of electrodes in the structure of a ferroelectric capacitor, a multilayer structure of a ferroelectric film and another film may be held between a pair of electrodes as follows:
When a ferroelectric film directly comes into contact with a silicon substrate in an FET type memory cell, it is difficult to stably operate a transistor due to occurrence of a trap level or formation of a dielectric material such as SiO
2
on the surface of the silicon substrate. Therefore, a multilayer structure of a dielectric film and a ferroelectric film may be employed on a silicon substrate. In this case, however, the dielectric film is a paraelectric material operating as a capacitor having no hysteresis characteristic, and does not overcome the aforementioned disadvantages such as dispersion in coercive filed.
For example, Japanese Patent Laying-Open No. 5-259391 (1993) discloses a structure obtained by stacking ferroelectric films. This gazette shows a structure obtained by stacking three ferroelectric films
103
a
,
103
b
and
103
c
between a bottom electrode
102
and a top electrode
104
, as shown in FIG.
70
. While the aforementioned gazette states that random defects of thin films are effectively reduced due to the multilayer structure of the ferroelectric films
103
a
,
103
b
and
103
c
, this structure does not overcome the aforementioned disadvantages such as dispersion in coercive filed.
Japanese Patent Laying-Open No. 7-14380 (1995) shows a structure obtained by connecting a ferroelectric capacitor
110
formed by a pair of electrodes
111
and
113
and a ferroelectric film
112
in parallel or series with a ferroelectric capacitor
120
formed by a pair of electrodes
121
and
123
and a ferroelectric film
122
, as shown in
FIGS. 71A
or
71
B. While the aforementioned gazette states that a composite hysteresis characteristic shown in
FIG. 72
is obtained due to this structure thereby implementing nondestructive reading and avoiding characteristic deterioration, this structure does not overcome the aforementioned disadvantages such as dispersion in coercive filed either.
Japanese Patent Laying-Open No. 7-14380 also states that three values can be stored by adjusting hysteresis characteristics of two ferroelectric films and obtaining a composite hysteresis characteristic shown in FIG.
73
.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a nonvolatile semiconductor memory device capable of suppressing dispersion in coercive filed and preventing reduction of voltage resistance without increasing the chip area.
Another object of the present invention is to provide a nonvolatile semiconductor memory device storing at least four values by changing a drive system for memory cells dissimilarly to the system described in Japanese Patent Laying-Open No. 7-14380.
According to the present invention, a nonvolatile semiconductor memory device rewriting stored information with a quantity of charges of a dielectric material comprises a ferroelectric film having a hysteresis characteristic in a dependency of an electric flux density D and an electric field E and a nonlinear element electrically connected with the ferroelectric film and having at least either such a characteristic that the quantity of increase of a positive electric flux density D with respect to the electric field E is small in a low electric field region and large in a high electric field region in the dependency of the electric field density D and the electric field E or such a characteristic that the quantity of increase of a positive current I is small in a low electric field or low voltage region and large in a high electric field or high voltage region in a dependency of the current I and the electric field E or an applied voltage V.
According to the inventive nonvolatile semiconductor memory device, the nonlinear element has a small quantity of increase of the positive electric flux density D with re

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