Nonvolatile semiconductor memory device

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S189060, C365S211000

Reexamination Certificate

active

07898840

ABSTRACT:
A nonvolatile semiconductor memory device comprises a memory cell array including first and second mutually crossing lines and electrically erasable programmable memory cells arranged at intersections of the first and second lines, each memory cell containing a variable resistor operative to nonvolatilely store the resistance thereof as data and a first non-ohmic element operative to switch the variable resistor; and a clamp voltage generator circuit operative to generate a clamp voltage required for access to the memory cell and applied to the first and second lines. The clamp voltage generator circuit has a temperature compensation function of compensating for the temperature characteristic of the first non-ohmic element.

REFERENCES:
patent: 7286403 (2007-10-01), Maejima
patent: 7778065 (2010-08-01), Lamorey et al.
patent: 2010/0110766 (2010-05-01), Wei et al.

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