Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2011-03-01
2011-03-01
Luu, Pho M (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S185200, C365S189020, C365S230020, C365S230060
Reexamination Certificate
active
07898889
ABSTRACT:
A memory includes first selective transistors connected between one end of cell strings and bit lines; second selective transistors connected between the other end of the cell strings and a cell source line; a dummy cell string; a first dummy selective transistor connected between one end of the dummy cell string and a dummy bit line and whose gate is connected to a first selective gate line; a second dummy selective transistor connected between the other end of the dummy cell string and the cell source line and whose gate is connected to a second selective gate line, wherein at a time of writing in a selected memory cell, a voltage of a first dummy bit line selected is driven to a different voltage from a voltage of an unselected bit line, and any of the dummy cell transistors connected to the first dummy bit line is written.
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Arai Fumitaka
Futatsuyama Takuya
Hashimoto Toshifumi
Kabushiki Kaisha Toshiba
Luu Pho M
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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