Nonvolatile semiconductor memory device

Static information storage and retrieval – Read/write circuit – Including signal comparison

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Details

365218, 365185, 365207, G11C 1140

Patent

active

054084334

ABSTRACT:
A nonvolatile memory device wherein the detection output of a comparator detector remains stable without oscillating even when the output of a sense amplifier enters an Insensitive zone which is a detection disable region of the comparator detector. The nonvolatile semiconductor memory device includes a comparator detector for comparing the output of a sense amplifier with a reference value, a coincidence detection circuit for detecting that erasure of a memory cell has been completed, and a low-pass filter interposed between the output of the comparator detector and an input of the coincidence detection circuit. By selection of a suitable time constant of the low-pass filter, oscillation waveforms of the output of the comparator detector can be prevented from being transmitted to the coincidence detection circuit, and completion of erasure can be detected accurately by the coincidence detection circuit.

REFERENCES:
patent: 5258950 (1993-11-01), Murashima

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