Nonvolatile semiconductor memory capable of selectively performi

Details Nonvolatile semiconductor memory capable of selectively performi Nonvolatile semiconductor memory capable of selectively performi

1996-08-13

1998-03-03

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Testing

36518524, 36518533, 365236, 365195, 365228, G11C 2900

Patent

active

057242895

ABSTRACT:
An electrically data chip-erasable nonvolatile semiconductor memory wherein a write instruction directing a pre-erase data write is disabled and then a one-time test data write and an automated data erase is executed according to an erase instruction. The semiconductor memory is provided with an automated count setter for supplying a preset write count according to the applied voltage state of the test mode terminals in an automated data erase and rewrite test and a control circuit for controlling data write and erase in response to the write count from the automated count setter. A test method of the nonvolatile semiconductor memory comprises the steps of disabling a write instruction directing a pre-erase data write (a pre-programming), and executing a one-time test data write and a subsequent automated data erase according to an erase instruction. Another test method of the nonvolatile semiconductor memory comprises the steps of assigning the counts of pre-erase data writes to a plurality of test mode terminals in advance, in an automated erase and rewrite test, applying a test voltage higher than a usually used one to a selected one of the test mode terminals, executing a pre-programming according to a write count derived from the voltage state of the selected test mode terminal, and then executing an erase test data programming and an auto-erase.

REFERENCES:
patent: 5402380 (1995-03-01), Kumakura et al.
patent: 5537357 (1996-07-01), Merchant et al.
patent: 5574684 (1996-11-01), Tomoeda

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