Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2010-04-07
2011-11-15
Roman, Angel (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S287000, C257SE21679
Reexamination Certificate
active
08058162
ABSTRACT:
A method of manufacturing a nonvolatile semiconductor memory includes: forming an insulator structure on a semiconductor substrate in a first region; forming a first gate insulating film on the semiconductor substrate outside the first region; blanket depositing a first gate material film and etching-back the first gate material film to form a first gate electrode on the first gate insulating film lateral to the insulator structure; removing the insulator structure; blanket forming a second gate insulating film; blanket depositing a second gate material film and etching-back the second gate material film to form a second gate electrode on the second gate insulating film in the first region; and silicidation of upper surfaces of the first and second gate electrodes. Any one of the first and second gate insulating films is a charge trapping film.
REFERENCES:
patent: 6194300 (2001-02-01), Hung et al.
patent: 2007/0155153 (2007-07-01), Okazaki et al.
patent: 2005-228957 (2005-08-01), None
patent: 2006-253433 (2006-09-01), None
Isaac Stanetta
Renesas Electronics Corporation
Roman Angel
Young & Thompson
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