Nonvolatile semiconductor memory

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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Details

C365S185290, C365S104000

Reexamination Certificate

active

07414909

ABSTRACT:
There is provided a high-density mask ROM operable at a high speed. With the mask ROM, respective source lines are disposed so as to be shared by memory cells in respective columns adjacent to each other, and bit lines are disposed so as to correspond to the respective columns of the memory cells. Further, the dummy cells are disposed for the respective columns of the memory cells. The dummy cells are each made up of a series-circuit including a first switching transistor that is turned into the conducting state in response to a signal potential on a dummy word line (DWL), and a second switching transistor17for coupling an adjacent source line to the bit line corresponding thereto in response to a potential of the source line in a column corresponding thereto. The memory cells each are made up of one unit of a transistor and a data storage formed by mask wiring. At the time of reading data, a potential of the source line in a select column is caused to undergo a change, whereupon there occurs a potential difference between a pair made up of the bit line as selected to which the memory cells as selected are coupled, and a reference bit line with the dummy cells coupled thereto, so that it is possible to execute readout of data by detecting the potential difference.

REFERENCES:
patent: 6307780 (2001-10-01), Tanaka et al.
patent: 7102926 (2006-09-01), Lee et al.
patent: 2006/0083072 (2006-04-01), Umezawa
patent: 07-211086 (1995-08-01), None
patent: 9-8255 (1997-01-01), None
patent: 11-191298 (1999-07-01), None
patent: 2001-203331 (2001-07-01), None
patent: 2001-358235 (2001-12-01), None

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