Nonvolatile semiconductor memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S316000, C257SE29129, C257SE29300

Reexamination Certificate

active

10983744

ABSTRACT:
A nonvolatile semiconductor memory on a semiconductor chip includes: a cell array region configured with a memory cell transistor having a first metallic salicide film, a first control gate electrode electrically coupled with the first metallic salicide film, and a floating gate electrode adjacent to the first control gate electrode; a high voltage circuit region including a high voltage transistor made of a second metallic salicide film, a first source region and a first drain region, and a first gate region arranged between the first source region and the first drain region; and a low voltage circuit region including a low voltage transistor made of a third metallic salicide film, a second source region and a second drain region electrically coupled with the third metallic salicide film, and a second gate region arranged between the second source region and the second drain region and is electrically coupled with the third metallic salicide film.

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U.S. Appl. No. 11/219,724, filed Sep. 7, 2005, Kutsukake et al.
U.S. Appl. No. 11/246,168, filed Oct. 11, 2005, Kamigaichi et al.
U.S. Appl. No. 11/877,833, filed Oct. 24, 2007, Kutsukake et al.
U.S. Appl. No. 10/214,582, filed Aug. 9, 2002, inventor Masayuki Ichige, et al.

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