Static information storage and retrieval – Floating gate – Particular biasing
Patent
1995-05-15
1996-08-13
Nguyen, Tan T.
Static information storage and retrieval
Floating gate
Particular biasing
36518529, 365218, G11C 1600
Patent
active
055463410
ABSTRACT:
A nonvolatile semiconductor memory device comprising an array of cell units, each cell unit including at least one memory transistor which has a floating gate and a control gate, the array being divided into a plurality of memory blocks each having a certain number of cell units. A selected memory block is erased by an erase voltage applied to a semiconductor substrate while unselected memory blocks are prevented from erasing by capacitive coupling of the erase voltage to floated word lines connected to control gates of memory transistors of the unselected memory blocks. In a program mode where a program voltage is applied to a selected word line of a selected memory block and a pass voltage is applied to unselected word lines of the selected memory block, channel regions and source and drain junctions of memory transistors of cell units in the selected memory block are charged to a program inhibition voltage. Channel regions and source and drain junctions of cell units associated with memory transistors programmed to the other binary data are discharged to be programmed while those of cell units associated with nonprogrammed memory transistors are maintained to the program inhibition voltage to prevent programming.
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Choi Jeong H.
Kim Jin K.
Suh Kang D.
Nguyen Tan T.
Samsung Electronics Co,. Ltd.
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