Nonvolatile semiconductor memory

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

365 63, 365103, G11C 700

Patent

active

059094052

ABSTRACT:
A semiconductor memory includes a plurality of main bit lines led to sense amplifiers and arranged in a row, direction, a first group of sub bit lines interposed between the memory banks and connected to the main bit lines through a first group of selection transistors, and a second group of sub bit lines interposed between the memory banks and the first group of sub bit lines and connected to a common ground line through a second group of selection transistors.

REFERENCES:
patent: 5280442 (1994-01-01), Hotta et al.
patent: 5726929 (1998-03-01), Suminaga et al.
patent: 5764575 (1998-06-01), Kawai et al.

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