Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
1997-09-15
2002-04-09
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S103000, C711S154000, C365S230010, C365S233100
Reexamination Certificate
active
06370628
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a nonvolatile semiconductor disk device (hereinafter referred to as a “disk card”) as one of peripheral function extender cards of a personal computer (hereinafter abbreviated to a “PC”), etc., and also relates to writing control to this disk card.
The disk card as a peripheral device of the PC is stored with data.
Then, the disk card is capable of holding a content of the storage without requiring a power supply.
Next, a nonvolatile semiconductor memory such as, e.g., a flash memory is employed as a storage medium of the disk card.
This nonvolatile semiconductor memory is stored with the data in such a form as to be formatted to a fixed size called a sector as in the case of the disk device like a flexible disk and a hard disk.
Incidentally, the disk card in a name card size becomes, with increases by leaps in storage capacity of the semiconductor memory, capable of storing the data of several tens of Mega bytes.
This disk card is used for storing data about a picture photographed by, e.g., a digital camera in the way of utilizing merits of being small in size but large in capacity and of the storage content being held even when switching off the power supply.
Next, the disk card with a completion of the photography is taken out of the digital camera and set in the PC, and the image data stored thereon can be read and digitally processed.
FIG. 1
is a diagram showing one example of a conventional disk card.
This disk card includes an interface unit
10
connected to a host
1
such as the digital camera and the PC, a central processing unit (hereinafter abbreviated to a “CPU”)
20
for executing whole control within the disk card by transmitting and receiving a variety of control signals to and from this host
1
, a disk control unit
30
for controlling a transfer of the data to the host
1
, an internal bus
40
through which to transfer the data inwardly the disk card, and a storage unit
50
for storing the data.
Then, the disk control unit
30
has a buffer memory
31
for temporarily holding sector-basis data given from the host
1
.
The sector contains e.g., 536-bytes data in such a fixed format that a header portion containing data about a validity, etc. of this sector and a correction code for correcting an error are added to, e.g., 512-bytes data.
The disk control unit
30
incorporates a function to write sector-basis data to the corresponding storage unit
50
via the internal bus
40
on the basis of an address signal given via the interface unit
10
, and to read the sector-basis data stored in the storage unit
50
.
The storage unit
50
is constructed of a plurality (e.g., 15 pieces) of memory chips
50
a
,
50
b
, . . . ,
50
n
connected in common to the internal bus
40
.
Addresses different from each other are allocated to these memory chips
50
a
-
50
n.
Then, each of the memory chips
50
a
-
50
n
has the same construction, and includes a buffer memory
51
for temporarily holding the sector-basis data and a nonvolatile semiconductor memory
52
for storing the sector-basis data.
The nonvolatile semiconductor memory
52
is capable of holding a content of the storage even if a supply of the power supply is stopped.
Each of the memory chips
50
a
-
50
n
has a memory control unit
53
for controlling a transfer of the sector-basis data between the buffer memory
51
and the nonvolatile semiconductor memory
52
.
Next, in this disk card, when the host
1
issues a command to write the data, the write data is temporarily held in the buffer memory
31
within the disk control unit
30
via the interface unit
10
.
The data held in the buffer memory
31
is transferred to and held in the buffer memory
51
in one of the memory chips
50
i
(however, i=a to n) which corresponds to the address thereof via the internal bus
40
.
The data held in the buffer memory
51
in the memory chip
50
i
is written to a predetermined storage area in the nonvolatile semiconductor memory
52
under the control of the memory control unit
53
.
At this time, a transfer time of the data transferred from the host
1
to the buffer memory via the interface unit
10
and the buffer memory
31
, is on the order of several hundred &mgr;s.
On the other hand, for instance, a time of several ms is required for writing the data temporarily held in the buffer memory
51
to the semiconductor memory
52
.
For this purpose, the storage unit
50
is divided into a plurality of memory chips
50
a
-
50
n
, and each memory chip, e.g.,
50
a
is provided with the buffer memory
51
and the nonvolatile semiconductor memory
52
.
Then, the data is independently written to the nonvolatile semiconductor memory
52
from each of the buffer memories
51
. With this operation, there can be substantially equivalently executed the writing process to the disk card from the host
1
.
On the other hand, under the control of the CPU
20
, when the host
1
issues a command to read the data, a reading command is given to the memory chip
50
a
stored with the data to be read.
Then, the sector-basis data is read from the corresponding storage area in the nonvolatile semiconductor memory
52
.
The thus read data is temporarily held in the buffer memory
51
and thereafter held in the buffer memory
31
within the disk control unit
30
via the internal bus
40
.
The data written to the buffer memory
31
is further transferred to the host
1
via the interface unit
10
.
There arise, however, the following problems inherent in the prior art disk card.
In the disk card, the storage unit
50
is divided into the plurality of memory chips
50
a
-
50
n
in order to substantially equivalently hold an access speed for high-velocity writing and reading processes in the interface unit
10
.
Next, each of the memory chips
50
a
-
50
n
is provided with the buffer memory
51
.
Then, the disk card is capable of equivalently executing the writing operations at the high speed by executing the writing operations to the memory chips
50
a
-
50
n
in parallel.
An electric current necessary for the writing operation per memory chip is on the order of, e.g., 15 mA.
A total operation current, when the number of the memory chips
50
a
-
50
n
in the process of the simultaneous writing operations increases, becomes large.
Accordingly, only the storage unit
50
requires a current of approximately 150 mA when ten pieces of memory chips
50
i
are in the simultaneous writing operations.
Therefore, the host
1
must include a power supply having a current capacity allowing for it.
The thus constructed disk card is used not only simply as a peripheral device of the PC but also for storing data about photographed picture in such a way as to be attached to, e.g., a digital camera.
The digital camera is driven by a battery and therefore has a limit in terms of being supplied with a large current when writing the image data.
It is a primary object of the present invention, which was contrived to obviate the problems inherent in the prior art described above, to provide a disk card requiring no large current of a power supply by restricting the number of memory chips
50
a
-
50
n
in the process of simultaneous writing operations.
SUMMARY OF THE INVENTION
To accomplish the above object, a nonvolatile semiconductor disk device according to the present invention is a disk card comprising an interface unit for transferring data given from outside, a plurality of memory chips each including a nonvolatile semiconductor memory for storing data and a buffer memory for temporarily holding the data to write the data to the semiconductor memory, and a control unit for outputting the data transferred via the interface unit, reading the data from a corresponding memory chip in accordance with a designation given from outside and outputting the data to the interface unit. The control unit monitors the number of simultaneous writing processes that are simultaneously being executed in the plurality of memory chips, and controls the outputs of the data given from outside to the correspo
Oki Electric Industry Co. Ltd.
Thai Tuan V.
Volentine & Francos, PLLC
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