Nonvolatile semiconductor device and a method of manufacturing t

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257506, 257775, 365185, H01L 2968, G11C 1134

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active

053389573

ABSTRACT:
The width of a charge storage electrode and a control electrode in the column direction is set to be wider above an element isolation region than that above a channel region. Therefore, the capacitance between the control electrode and the charge storage electrode can be increased to improve the coupling ratio in a nonvolatile semiconductor memory device. Also, a first interconnection layer is equal in height above the control electrode and above the channel region, so that patterning of the first interconnection layer can be carried out easily and precisely.

REFERENCES:
patent: 5027175 (1991-06-01), Iwasa
"0.6 .mu.m EPROM Cell Design Based on a New Scaling Scenario", by Kuniyoshi Yoshikawa et al, 1989 IEDM Tech. Digest, pp. 587-590.
"A 3.6 .mu.m.sup.2 Memory Cell Structure for 16MB EPROMS", by Yosiaki S. Hisamune et al, 1989 IEDM Tech. Digest, pp. 583-586.

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