Nonvolatile memory wear leveling by data replacement processing

Details Nonvolatile memory wear leveling by data replacement processing Nonvolatile memory wear leveling by data replacement processing

2007-03-19

2008-11-11

Ellis, Kevin (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C365S185330

Reexamination Certificate

active

07451266

ABSTRACT:
A risk of data garbling due to cumulative impact of disturbances occurring in memory areas in which no rewrite occurs is to be prevented. A memory device has an erasable and writable nonvolatile memory and a control circuit, wherein the control circuit is enabled to perform processing at a prescribed timing to replace memory areas. The replacement processing is accomplished by writing stored data in a first memory area in which rewriting is relatively infrequent into an unused second memory area, and making the second memory area into which the writing has been done a used area in place of the first memory area. Since this replacement processing is intended to replace memory areas in which rewriting is infrequent with other memory areas as described above, it is possible to prevent the risk of data garbling due to the cumulative impact of disturbances occurring in memory areas in which no rewrite occurs.

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