Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-11-08
2005-11-08
Yoha, Connie C. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220, C365S185240, C365S185180
Reexamination Certificate
active
06963507
ABSTRACT:
Disclosed is a nonvolatile memory with a shortened total write time, capable of stably writing data by making a write current constant while reducing fluctuations in a voltage generated by a booster circuit. In a nonvolatile memory such as a flash memory, data is determined at the time of writing operation. While skipping a bit corresponding to write data having the logic “1” (or logic “0”), writing operation to bits corresponding to write data having the logic “0” (or logic “1) is successively performed.
REFERENCES:
patent: 5297029 (1994-03-01), Nakai et al.
patent: 5319598 (1994-06-01), Aralis et al.
patent: 5781756 (1998-07-01), Hung
patent: 6222773 (2001-04-01), Tanzawa et al.
patent: 6392932 (2002-05-01), Ishii et al.
patent: 6519184 (2003-02-01), Tanaka et al.
patent: 6571311 (2003-05-01), Kuwano
patent: 4-38700 (1992-02-01), None
patent: 5-62484 (1993-03-01), None
patent: 5-325574 (1993-12-01), None
Fujito Masamichi
Kawajiri Yoshiki
Makuta Kiichi
Shinagawa Yutaka
Suzukawa Kazufumi
Hitachi ULSI Systems Co. Ltd.
Miles & Stockbridge P.C.
Yoha Connie C.
LandOfFree
Nonvolatile memory, semiconductor device, and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile memory, semiconductor device, and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile memory, semiconductor device, and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3461774