Nonvolatile memory device with a high number of cycle programmin

Static information storage and retrieval – Systems using particular element – Semiconductive

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365189, 365185, 307296R, G11C 1134, G11C 700, H03K 301

Patent

active

048071889

ABSTRACT:
An electrically alterable, non volatile memory device capable of enduring a high number of cycles utilizes an array of "semidouble" cells, each formed by a pair of elementary EEPROM cells connected substantially in parallel and a single select transistor. A special program lines biasing circuit generating a bias voltage representative of a condition wherein one of the two elementary EEPROM structure is broken and sense amplifiers comprising a comparator circuit comparing the current flowing through an addressed semidouble memory cell with the current flowing through a reference cell comprising a pair of virgin EEPROM type elementary cells to ensure operability of each bit of the memory also when one of the two elementary cells supporting the bit fails. Different from known memories, only the EEPROM structure is duplicated while column lines, select lines and ancillary circuitry don't require duplication.

REFERENCES:
patent: 4616339 (1986-10-01), Cuppens et al.
patent: 4667312 (1987-05-01), Doung et al.
patent: 4677590 (1987-06-01), Arakawa
patent: 4761765 (1988-08-01), Hashimoto

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