Nonvolatile memory device for preventing program disturbance...

Details Nonvolatile memory device for preventing program disturbance... Nonvolatile memory device for preventing program disturbance...

2011-02-15

2011-02-15

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170

Reexamination Certificate

active

07889567

ABSTRACT:
A nonvolatile memory device for preventing program disturbances includes a memory cell array block, a word line driver, and a well bias control unit. The memory cell array block includes at least one cell string having a plurality of memory cells serially connected to a bit line and alternately connected to even word lines and odd word lines. After a program verification, the word line driver drives the even word lines with a first voltage and then the odd word lines with the first voltage to drop the even word line to a voltage lower than the first voltage. The well bias control unit floats a bias of a p-well formed by high voltage NMOS transistors that apply corresponding driving voltages to the even word lines and the odd word lines according to an operation mode of a program operation, a read operation, and an erase operation.

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patent: 2000-243094 (2000-09-01), None
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English Abstract for Publication No.: 2000-243094.
English Abstract for Publication No.: 1020020054511.

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