Nonvolatile memory device

Details Nonvolatile memory device Nonvolatile memory device

2009-11-25

2011-10-18

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185140

Reexamination Certificate

active

08040730

ABSTRACT:
A nonvolatile semiconductor memory device includes a memory cell array and a control circuit configured to control reading and programming operations for reading data from and inputting data to the memory cell array, respectively. The control circuit includes first and second units. The first unit is configured to count a number of bits having logic 0 or a number of bits having logic 1, to set a logic where the counted number is greater than n/2 as an initial state to regenerate programming data, and to perform a programming operation based on the regenerated data, when simultaneously programming the programming data of n bits input for a designated address. The second unit is configured to program a recognition bit for recognizing which of the logic 0 and the logic 1 the initial state of the memory cell of the designated address is in, when the programming operation is performed.

REFERENCES:
patent: 7602642 (2009-10-01), Choi
patent: 7757153 (2010-07-01), Hwang et al.
patent: 7787305 (2010-08-01), Kim et al.
patent: 2006/0004970 (2006-01-01), Jeong et al.
patent: 2006/0077720 (2006-04-01), Im
patent: 2006024347 (2006-01-01), None

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