Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1989-06-20
1990-11-20
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Differential sensing
365185, 365203, 365205, G11C 1700
Patent
active
049723782
ABSTRACT:
An electrically programmable nonvolatile memory circuit device includes a plurality of memory cell transistors from which data is read out, dummy cell transistors which are each selectively operated at the same time as the operation of a selected one of said memory cell transistors in the same condition as the selected memory cell transistor at the time of reading out data from the selected memory cell transistor, and a sense amplifier including a logic gate circuit for converting the programming state of the memory cell transistor into a logic value based on a difference between the current characteristics of the memory cell transistor and the dummy cell transistor. When the source-drain current of the memory cell transistors set in the non-programmed state is denoted by I1, the source-drain current of the dummy cell transistor is denoted by I2, and the source-drain current of the memory cell transistors set in the programmed state is denoted by I3, then currents I1, I2 and I3 are so set as to satisfy the current relation of "I1>I2>I3".
REFERENCES:
patent: 4458348 (1984-07-01), Fukuda et al.
patent: 4611301 (1986-09-01), Iwahashi et al.
Ito Makoto
Kitagawa Nobutaka
Kabushiki Kaisha Toshiba
Popek Joseph A.
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