Nonvolatile memory circuit based on change in MIS transistor...

Details Nonvolatile memory circuit based on change in MIS transistor... Nonvolatile memory circuit based on change in MIS transistor...

2007-03-20

2007-03-20

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S182000

Reexamination Certificate

active

11180132

ABSTRACT:
A memory circuit includes a latch having a first node and a second node, a plate line, a word selecting line, a first MIS transistor having source/drain nodes thereof coupled to the first node and the plate line, respectively, and a gate node thereof coupled to the word selecting line, a second MIS transistor having source/drain nodes thereof coupled to the second node and the plate line, respectively, and a gate node thereof coupled to the word selecting line, and a driver configured to set the plate line to a first potential causing a current to flow in a first direction through the first MIS transistor in a first operation mode and to a second potential causing a current to flow in a second direction through the first MIS transistor in a second operation mode, the first operation mode causing a lingering change in characteristics of the first MIS transistor.

REFERENCES:
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patent: 4419744 (1983-12-01), Rutter
patent: 5956269 (1999-09-01), Ouyang et al.
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patent: 6906953 (2005-06-01), Forbes
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patent: 2005/0232009 (2005-10-01), Nakamura
patent: 06 076582 (1994-03-01), None
patent: WO 2004 057621 (2004-07-01), None

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