Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-06-28
2003-09-30
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S100000, C711S154000, C711S202000
Reexamination Certificate
active
06629191
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention concerns a memory device, especially a memory device housing data erasure operation, and a memory, using a nonvolatile memory.
Small information-processing equipment use card type semiconductor memories, because the resistance to physical impact vibration is high they require low power consumption. Also, the magnetic disk unit and interface signal and protocol are often compatible.
However there are few restrictions upon the number of times a rewrite operation will take place in the same area of the memory, and the data management system does not take into considerations the rewrite frequency to an identical portion of the memory.
In the conventional semiconductor memory, the rewrite frequency is often restricted because the method of rewriting utilizes stress to apply a strong electric field for rewriting. Therefore, the memory is sometimes damaged and the reliability of the entire memory is compromised, when it the deterioration applied to the management system of the data in magnetic disk unit Such management information is rewritten at a greater frequency than the usual data storage area and as such requires that there is no degradation in the portion of the memory where it is stored. Otherwise, the entire memory would suffer.
Various technology is proposed with advancing the development in which rewrite possible frequency of the memory element itself is improved. For example, in Japanese Laid Open No. 5-27924, the erasure-frequency at the rewrite unit (the erasure unit) of the nonvolatile memory is counted and recorded. In the case of the new writing, the equalizing of erasure frequency between the rewrite unit (the erasure unit) of the nonvolatile memory is attempted by storing in the area with small erasure frequencies. As this result, the life of the memory is extended. Similarly, in Japanese Laid Open No. 6-124596 the erasure frequency is counted at the rewrite unit (the erasure unit) of the nonvolatile memory, recorded, and attempts at equalizing of the erasure frequency are shown by equalizing physical erasure frequency in the whole area on the memory medium. In other words, there is equalizing of the number of rewrites for the entire memory.
SUMMARY OF THE INVENTION
However, the physical housing address on the memory in proportion to the logical address in which the host instructs in the case of the rewrite in the technology always changes, and the physical housing address is changed by the increase in the erasure frequency. Therefore, the following are required with the logical address which the host designates: Address reference table in which the physical address on the memory stored actually corresponds and management information which is similar for it. When the address administration table is established, though the large-scale memory area is required, because address reference of the whole memory area must be possible, it does not have, electric power supply If an address administration table is established, then the memory space allocated therefore should be able to withstand a high rewrite voltage.
Again, in until now nonvolatile memory (of the following, flash memory) in which the rewrite is electrically possible, in order to facilitate the utilization as a memory of the magnetic disk unit compatibility, in making the size of capacity unit (the physical rewrite block) which eliminates the data to be the management unit of the data by magnetic disk unit, it was made to agree with the sector generally used. However, a purpose is to reduce the memory chip area by the improvement in the circuit efficiency and lower cost, and the result is that the capacity of the physical rewrite block increases.
In such flash memory, the size of the management unit (since then, it is called a sector) of the data designated from the host will be different from the size of memory medium of the data of the management unit (the physical rewrite block), and the management practice of the data considering this point is required. For example, it is considered that the sector of the N piece is allocated in one physical rewrite block in order to do the efficient housing, when it is the size in which the size of the physical rewrite block of the memory can store the sector of the multiple (the for example N piece). The rewrite processing (erasure and processing at the block unit and afterwards writing processing) will be conducted even in this case and the case in which only one within the sector of the N piece stored in one physical rewrite block was rewritten on the physical rewrite block. As this result, rewrite frequency of one physical rewrite block increases for N twice in allocating in the 1 sector. This becomes that it will shorten the life of the memory over the necessity and accelerates the equipment degradation in consequence.
In the future, with the aim of the large-capacity low cost which is equal to the magnetic disk unit, since the cost of the flash memory is lowered, the reducing of the memory chip area is required resistant, and the multivalued memory in which one cell memorizes multiple memory bits will be used practically. By this fact, the problem like the superscription seems to become more serious, when the capacity expansion of the physical rewrite block is promoted.
The purpose of this invention is that in the memory that it electrically rewrites block unit erasure processing and makes the possible nonvolatile memory to be memory medium, it prevents degradation of whole memory by the fact that the rewrite of the specific data is frequently carried out or lowering of the reliability, and that it realizes the improvement in the memory life.
The first memory by this invention takes following composition. The control means for reading and writing of the data for semiconductor memory with the reading and writing indication by nonvolatile semiconductor memory in which it is possible rewriting and readout from the outside or addressing at logic housing block unit which is minimum unit for the writing which eliminate memorizing data at the physical block unit is possessed. In the every physical block, the erasure frequency is counted, this control means records it, and logic housing block which the this physics block has allocated is transferred physical block of the development area, when it reached the frequency that erasure frequency of the physical block was beforehand determined.
On the access of this logic housing block in the since then, it is made that it is done for the physical block in this transferred development area to be features. For example, the fixed area of the semiconductor memory is equipped with the development area. And, the sector which for example, are the data management unit of the host, etc. are correspondent to the logic housing block.
In the second memory by this invention, multiple and that it stores it are possible in respect of the logic housing block aforesaid block. Then, in the every logic housing block, the rewrite frequency is counted, the control means records it, and on the access of this logic housing block in the since then, it is made that it transfers the this logic housing block physical block of the development area, when it reached the frequency that the rewrite frequency was beforehand determined, and does it for physical block in the development area moved aforesaid to be features.
Logic housing block of which the error was detected in the readout is transferred physical block in the development area, after it added error detection correction code in every logic housing block that the writing was indicated the control means more and more by the addressing in the third memory by this invention, and after it carried out the correction. Then, it is made that it is done for the physical block in the transferred development area to be features on the access in the since then for the logic housing block.
In the first, second and the third memory, the physical block may do the aforesaid logic housing block, as multiple and that it stores it are possible, and multiple logic housing blo
Katayama Kunihiro
Nakamura Kazuo
Tamura Takayuki
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Thai Tuan V.
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