Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2011-04-26
2011-04-26
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S226000
Reexamination Certificate
active
07933158
ABSTRACT:
For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.
REFERENCES:
patent: 5469390 (1995-11-01), Sasaki et al.
patent: 5754567 (1998-05-01), Norman
patent: 5765184 (1998-06-01), Durante
patent: 5784327 (1998-07-01), Hazani
patent: 5786587 (1998-07-01), Colgate, Jr.
patent: 5890188 (1999-03-01), Okamoto et al.
patent: 6058048 (2000-05-01), Kwon
patent: 6172906 (2001-01-01), Estakhri et al.
patent: 6209113 (2001-03-01), Roohparvar
patent: 6327639 (2001-12-01), Asnaashari
patent: 6373748 (2002-04-01), Ikehashi et al.
patent: 6397314 (2002-05-01), Estakhri et al.
patent: 6467056 (2002-10-01), Satou et al.
patent: 6496411 (2002-12-01), Yamada et al.
patent: 6563755 (2003-05-01), Yahata et al.
patent: 6611938 (2003-08-01), Tanaka et al.
patent: 6678788 (2004-01-01), O'Connell
patent: 6700809 (2004-03-01), Ng et al.
patent: 6711054 (2004-03-01), Kanamitsu et al.
patent: 6760256 (2004-07-01), Imamiya
patent: 6788575 (2004-09-01), Kozakai et al.
patent: 6876559 (2005-04-01), Rathnavelu et al.
patent: 6903971 (2005-06-01), Imamiya
patent: 6930909 (2005-08-01), Moore et al.
patent: 7106636 (2006-09-01), Eilert et al.
patent: 7158411 (2007-01-01), Yeh et al.
patent: 7382637 (2008-06-01), Rathnavelu et al.
patent: 7660184 (2010-02-01), Kobayashi
patent: 2008/0049505 (2008-02-01), Kim et al.
patent: 2010/0091594 (2010-04-01), Kobayashi
patent: 07-200398 (1995-08-01), None
patent: 2000-251484 (2000-09-01), None
patent: 2001-14888 (2001-01-01), None
patent: 2001-109629 (2001-04-01), None
Iguchi Shinya
Ishii Tatsuya
Kozakai Kenji
Maruyama Jun-ichi
Nakamura Takeshi
Miles & Stockbridge P.C.
Nguyen Tuan T.
Renesas Electronics Corporation
LandOfFree
Nonvolatile memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2627526