Nonvolatile memories with laterally recessed charge-trapping...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29309, C438S591000

Reexamination Certificate

active

07816726

ABSTRACT:
Charge-trapping dielectric (160) in a nonvolatile memory cell is recessed from under the control gate's edge and/or from an edge of a substrate isolation region. The recessed geometry serves to reduce or eliminate charge trapping in regions from which the charge may be difficult to erase.

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U.S. Appl. No. 11/872,477, filed Oct. 15, 2007 by Yue-Song He et al., 22 pages.

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