Nonvolatile ferroelectric memory device

Details Nonvolatile ferroelectric memory device Nonvolatile ferroelectric memory device

1998-12-15

2000-07-18

Phan, Trong

Static information storage and retrieval

Systems using particular element

Ferroelectric

365149, 36523006, G11C 1122, G11C 1124, G11C 800

Patent

active

060916222

ABSTRACT:
The ferroelectric memory device of the present invention controls the data input and output timing in the memory by a combination of the changes of X, Y, Z addresses and chip enable signals so that the ferroelectric memory device is enabled. The ferroelectric memory device includes a plurality of bitlines and a plurality of bitbarlines intersect a plurality of split wordlines, which comprises of a pair of a first split wordline and a second split wordline. A plurality of memory cells are formed between the first and second split wordlines, and a timing controller controls the data input and output timing of the memory cells according to the changes of the X, Y, Z addresses and the chip enable signals.

REFERENCES:
patent: 5373463 (1994-12-01), Jones, Jr.
patent: 5815430 (1998-09-01), Verhaeghe et al.
patent: 5903492 (1999-05-01), Takashima

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